Design of an optimized Reversible Ternary and Binary Bidirectional and Normalization Barrel Shifters for Floating Point Arithmetic

© 2014 AENSI Publisher All rights reserved. To Cite This Article: Zahra Khadem, Design of an optimized Reversible Ternary and Binary Bidirectional and Normalization Barrel Shifters for Floating Point Arithmetic, Adv. Environ. Biol., 8(10), 1432-1444, 2014 INTRODUCTION Although traditional computers with the advent of VLSI and ULSI technologies are constructed in smaller dimensions and high processing speed, but always there is a question that up to where they can continue in such a direction. Due to the fact that there is a constraint for traditional computers’ dimensions and processing speed, it cannot be continued any more. Thus in such a case novel technologies based on nanotechnology such as Quantum Computing will be replaced with the traditional ones. Quantum computers are based on Quantum physics’ laws and have been constructed on reversible gates design and using hardware concludes Quantum tools, are suitable substitute for classic computers in the near future. In other words, nowadays, quantum computing and reversible circuits, in order to power minimization designs, have received significant attention. Bit loss from information relates to heat generation whereas in reversible circuits due to this fact that there is no any information loss, no heat will be generated. From one point of view Circuit design using reversible gates relates to no energy consumption in circuits. Landaulet[1] proved that generated heat for erasure of a single bit is KTln2 joules of energy Where K= 1.3806505*10 -23 m 2 kg -2 K -1 (joule/Kelvin) is Boltzmann constant and T is the absolute temperature of the environment. In 1973 Bennett [2] pointed out that reversible computing is computing without any information loss. Reversible logic is one of the interested subjects in systems based on nanotechnology, Quantum computing, low power CMOS design, DNA computing, bioinformatics and optical information processing. Multiple-valued quantum circuits are important options for future quantum computing and they have several advantages more than the corresponding binary quantum system. Muthukrishnan and Stroud showed realization of multiple-valued quantum gates using liquid ion-traps and proposed a family of 2qudit multiple-valued gates called M-S gate[3]. The implementation of Ternary logic gate is realized by M-S gate. Moreover, ternary quantum gates have been realized using traps ions by Klimov et al [4], Hugh and Twamley [5]. Ternary reversible/quantum logic synthesis is a neoteric and growing area. There is a good number of works that have been presented on ternary quantum logic synthesis [6-18]. The quantum gates act on quantum bits (qubit). A qubit is a unit of quantum information. In ternary logic the possible states for a qubit are 2 & 1 , 0 . On the other hand, circuit design for shifting data is possible as combinatorial and sequential 1433 Zahra Khadem, 2014 Advances in Environmental Biology, 8(10) June 2014, Pages: 1432-1444 circuits. Shift registers are sequential circuits which require clock pulse for shifting data while barrel shifters are combinatorial circuits without any requirement clock pulse. As we know, the most popular numerical system that is commonly used in computer systems and has peculiar importance in its widespread use in various areas is “floating point” numbers. In floating point operations such as addition/subtraction, multiplication and division, shifters are key components and crucial in computing speed. The speed of shifters has an extreme impact on overall performance of the floating-point addition/subtraction unit. Consequently, shifters are usually implemented as combinatorial shifters rather than shift registers, which would require a large and variable number of clock cycles to complete the shift. Barrel shifters are a common design choice due to fulfilling multi-bit shifts in a single cycle. Barrel shifters are normally utilized in many applications as: word pack/unpack, encryption and decryption Algorithms, test generation for DSP [19], variable length encoding, floating-point normalization, quantum-dot cellular automata [20], high-speed/low-power error-control application [21] and many other applications. To design a reversible ternary and binary floating point adder/subtractor is required to have crucial ternary/binary barrel shifters, so in this paper, optimized reversible binary and ternary bidirectional barrel shifters and also normalization barrel shifters for floating point arithmetic are presented for the first time. The proposed work is the first endeavor for designing reversible binary and ternary non-rotating barrel shifters. The structure of the paper is organized as follows: section 2 discusses the common definitions of reversible and ternary logic and some utilized ternary gates. Section 3 presents a summary of the works that have been performed on reversible binary and ternary barrel shifters. Introductory structure on barrel shifters as well as Reversible binary and ternary bidirectional logarithmic logical shifter is described in section 4. Required reversible barrel shifters for floating point arithmetic are proposed in section 4 too. The simulation results with VHDL language and Quartus simulator are shown in section 5 and section 6 draws conclusions. Reversible Binary and Ternary Gates: A reversible circuit is composed of reversible gates in which there is a one-to-one relationship between its inputs and outputs [22]. Designing reversible circuits using reversible gates have two limitations: one of the constraints is that the fan-out is not allowed; therefore FG is often used as a copying gate. The other limitation is that the feed-back is forbidden. In this section the definitions of garbage outputs, constant inputs/ancilla bits, quantum cost and necessary ternary gates are described. For information on other utilized reversible gates such as NOT, FG, FRG, PG you can refer to [23, 24] references. Garbage outputs: Garbage outputs are used to preserve reversibility and they are defined as some outputs that are not used for further computations in the circuit [25, 26]. Constant inputs/Ancilla bits: The inputs that are added to an n×k function to make it reversible, are called constant inputs [25, 26], in other words an auxiliary input that has a constant value is called an ancilla bit. Quantum cost: The quantum cost of a reversible gate is realized by using 1×1 and 2×2 reversible gates. The quantum cost of 1×1 and 2×2 reversible gates are zero and one respectively[25, 26]. The quantum cost of a ternary gate is the number of 1-qudit gates (shift gates) and 2-qudit gates (M-S gates) that are used in its implementation. Ternary Modified Fredkin Gate: Modified Fredkin gate is a reversible ternary 4*4 gate. It has been proposed in [27] by A. I. Khan et al. MFG can be represented as: ) , , , ( ) , , , ( C BelseS DifA S D BelseR CifA R B Q A P O D C B A I V V           Where V I and V O are the input and output vectors. The symbolic representation of a 4-qutrit MFG is depicted in figure 1. If A was larger than or equal to B (A≥B) then input lines(C, D) are displaced otherwise outputs(R, S) are the same repetitive inputs. According to MFG realization by M-S gates in figure 2, the QC of MFG is 41. It consists of 21 shift gates and 20 M-S gates. The proposed circuits exert this gate as a 2*1 multiplexer. Ternary Feynman Gate: A ternary Feynman gate can be described by the equations: P=A, Q=A+B where P is the pass through output and Q is the controlled output. A “+” sign is used to indicate GF (3) addition. This gate is used by designer for fan-out purpose. If the controlled input (B) is set to zero the Q and P output are A. The logic diagram of ternary Feynman gate is demonstrated in figure 3. Ternary Feynman gate can be realized using two M–S gates and two shift gates with QC=4. In Figure 3, P = (A + 1) + 2= A. If A = 0, then a1 = 0 and a2 = 1 none of the transformations will be applied on B and the output will be Q = B = B + 0 = A + B. If A = 1, then a1 = 1 and a2 = 2 only the right transformation (+1) will be applied on B and the output will be Q = B + 1 = A + B. If A 1434 Zahra Khadem, 2014 Advances in Environmental Biology, 8(10) June 2014, Pages: 1432-1444 = 2, then a1 = 2 and a2 =0 the left transformation (+2) will be applied on B and the output will be Q = B + 2 = A + B [27].